What is JFET?
A JFET consists of a p-type or n-type silicon bar containing two pn junctions at the sides as shown in the Figure below. The bar forms the conducting channel for the charge carriers. If the bar is of n-type, it is called n-channel JFET and if the bar is of p-type, it is called a p-channel JFET. The two pn junctions forming diodes are connected internally and a common terminal called gate is taken out. Other terminals are source and drain taken out from the bar. Thus a JFET has essentially three terminals which are gate (G), source (S) and drain (D)
Principle of Operation Of JFET
The two p-n junction of the sides from two depletion layers. Current conduction by the charge carriers is through the channel between the two depletion layers and out of the drain. The width and hence resistance of this channel can be controlled by changing the output voltage VGS. The greater the reverse voltage VGS, the wider the depletion layers and narrower will be the conducting channel. The narrower channel means greater resistance and hence source to drain current decreases. Reverse is the case when VGS decrease. The magnitude of Is can be charged by alternating VGS.
Working Of JFET
When a voltage VGS is applied between drain & source terminals and Vas is zero, the two p-n junction at the sides of the bar establish depletion layers. The electrons will flow from source to drain through a channel between the depletion layers. The size of these layers determine the width of the channel and hence the current conduct through the bar.
NOTE:- The resistance of the channel depends on it area of x – section current from source to drain can be controlled by the application of an electric field on the gate
Principle of Operation Of JFET
IMPORTANCE CHARACTERISTICS OF JFET
Hiigher input impedance
Generate less noise
High resistance to nuclear radiation
It is a 3-terminal device terminal voltage controlled semiconductor device i.e. input voltage controls the output characteristicIt is always operated with Vas p-n junction reversed biased.
Gate current, IG = 0A. Hence ID = IS.
JFET is not subject to thermal runaway when the temperature of the device increase
The drain current ID is controlled by changing the channel width
No β rating for JFET because of since IG = 0